Interest in memory processing technology continues to grow, and Israeli startups have emerged from the stealth model and launched a PIM-based data analysis architecture, which proves this.
According to CEO Elad Sity, Tel Aviv-based NeuroBlade has begun to launch its data accelerator, which aims to reduce data movement and the resulting bottlenecks by integrating in-memory processing functions.
Like many accelerators, NeuroBlade has a specific purpose: to accelerate data analysis. Other accelerators focus on improving storage or artificial intelligence workloads.
The company was founded in 2017 and has grown to more than 100 employees. It recently received a venture capital investment of 83 million U.S. dollars, bringing the total investment capital to 110 million U.S. dollars. The investment was led by Corner Ventures and funded by Intel Capital.
In an interview, Sity stated that NeuroBlade's customers and partners are now integrating its data analysis accelerator into their systems.
As the amount of data grows exponentially and AI workloads become more diverse, delivering data to where it is needed becomes critical. Sity said that due to the continuous changes in data between storage, memory, and central processing, the current architecture cannot scale to meet future data analysis needs. The result is poor application performance and slow response time.
NeuroBlade uses PIM to develop a new architectural building block specifically designed to accelerate workloads that help accelerate decision-making algorithms.
NeuroBlade initially focused on how and why the CPU and GPU cannot handle data-intensive workloads, despite the addition of more memory to the CPU and a new cache hierarchy.
Sity said that PIM advances data analysis by reducing data movement, whether in AI workloads or general computing. When constructing computational memory, choosing the appropriate logic and specific operations to be processed in the memory are key steps. "This is determined by the use case," Sity said. Each use case requires unique software.
Sity said that analysis software from vendors such as SAP can take advantage of NeuroBlade's approach. Nevertheless, potential users large and small want to avoid the hassle of programming memory. Therefore, NeuroBlade focuses on shrinking the use cases of its accelerators, rather than developing a platform that can be easily integrated. The logical choice is data analysis, with its huge database running in an enterprise data center.
Easier integration is achieved by leveraging PCI Express (PCIe) to connect and accelerate the CPU used in data-intensive applications. Although high-bandwidth memory is synonymous with high-performance computing, NeuroBlade's XRAM computing memory is DRAM-based and integrates embedded processing logic and other processing elements near the storage library to provide high-bandwidth large-scale parallel execution.
Sity said NeuroBlade had considered other memories, such as 3D Xpoint, but concluded that they were not ready yet. Although flash memory is dense, it is not fast enough. "DRAM is definitely the obvious choice," he said.
NeuroBlade positions itself as a data analysis rather than a memory supplier, and it relies on reliable PCIe and DRAM to simplify its technology adoption and integration. Providing the accelerator as a data device included with the software development kit (SDK) further facilitates adoption. "Our goal is not to sell you XRAM," Sity said. "The goal is not to get someone to buy additional memory and a connection to the CPU."
The PIM method is not new. The barrier to adoption is complexity. Samsung recently increased its efforts to implement PIM through its high-bandwidth memory PIM by designing processing and memory architectures in accordance with existing industry standards. This method can directly replace commodity DRAM. Samsung also provides an SDK.
HBM-PIM is different from the traditional von Neumann architecture. It brings processing power directly to the data storage location, and places a DRAM-optimized AI engine in each storage bank. The storage sub-unit supports parallel processing while minimizing data movement.
Micron Technology’s Automata processor was released in 2013 but is no longer under development. It takes advantage of the inherent bit parallelism of traditional SDRAM. This method is touted as a new processor architecture designed to accelerate the search and analysis of complex and unstructured data streams. Automata's design is based on an adaptation of the memory array architecture, which consists of tens of thousands to millions of interconnected processing elements.
NeuroBlade positions its approach to complement general-purpose and GPU-enabled platforms from companies such as Nvidia and AI startups that handle computationally intensive workloads.
Gary Hilson is a freelance writer and editor who has written thousands of words for print and pixel publications in North America. His areas of interest include software, corporate and network technology, research and education, sustainable transportation, and community journalism. His articles have been published in Network Computing, InformationWeek, Computing Canada, Computer Dealer News, Toronto Business Times, Strategy Magazine and Ottawa Citizen.
Gary Hilson is a freelance writer and editor who has written thousands of words for print and pixel publications in North America. His areas of interest include software, corporate and network technology, research and education, sustainable transportation, and community journalism. His articles have been published in Network Computing, InformationWeek, Computing Canada, Computer Dealer News, Toronto Business Times, Strategy Magazine and Ottawa Citizen.
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